Method for reducing the defect density of an integrated circuit

Details Method for reducing the defect density of an integrated circuit Method for reducing the defect density of an integrated circuit

H - Electricity

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356/130

H01L 21/265 (2006.01) H01L 21/20 (2006.01) H01L 21/74 (2006.01) H01L 29/06 (2006.01)

Patent

CA 1046168

ABSTRACT OF THE DISCLOSURE The buried layer of an integrated circuit is produced by use of a grated mask. The growth of sili- con dioxide in the exposed areas of the grate forms a stepped surface. Thereafter ion implantation in these areas and then merging the implanted regions forms a single buried region having a corrugated sur- face on which an epitaxial layer is grown. Such cor- rugated surface reduces the defect regions in the epi- taxial layer. - 8 -

261439

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