Method of forming viaducts in semiconductor material

Details Method of forming viaducts in semiconductor material Method of forming viaducts in semiconductor material

H - Electricity

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H01L 21/46 (2006.01) B26F 1/26 (2006.01) B41J 2/16 (2006.01) C23F 1/02 (2006.01) G03F 1/16 (2006.01)

Patent

CA 1072219

METHOD OF FORMING VIADUCTS IN SEMICONDUCTOR MATERIAL Abstract of the Disclosure This method of forming viaducts or "through-holes" in semiconductor material for transistor and integrated circuit fabrication and especially for ink jet printing systems forms viaducts of uniform diameter without critical regis- tration of masks. A seed layer of Cr-Au is sputtered onto a silicon- dioxide substrate. The viaducts or holes to be made are imaged by a photoresist process with a 5 µ, thick photoresist on this seed layer. A 4 µ thick gold layer is now applied on the seed layer by a plating process. After the dis- solution of the photoresist this layer contains the hole pattern with the holes having the required diameter. In order to make a through-hole, the substrate has to be etched. For that purpose, the bare substrate surface is covered with photoresist and exposed from the back through gold holes; and subsequently developed. Problems owing to light diffrac- tion at the edges of the gold with respect to the great distance of the gold mask photoresist layer are not antici- pated here because of the large holes and the high tolerances in this process step. Prior to etching the substrate, the gold layer with the hole pattern is covered by photoresist so that the substrate etching can take place from one side only. Now the substrate is etched until all of the gold holes are free. In that process, the extent of the sub- strate sub-etching is of small importance as the viaduct or hole diameter is defined by the gold mask. The photoresist is removed and the exposed substrate surfaces are protected against chemical reactions with the ink by a vapor-deposition of a protective layer.

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