G - Physics – 06 – F
Patent
G - Physics
06
F
354/241
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Patent
CA 1099415
ABSTRACT A method and an apparatus for improving the speed of executing instructions and reducing the microprogram memory requirements in a conventional digital computer system by eliminating a ROM address register for addressing micro- words. The method or apparatus incorporates the use of a predetermined bit position in the microinstruction word which is set to a binary one when the microword is the last microword of an executing microprogram. The apparatus is responsive to the electronic representation of the binary one signal to cause the microinstruction execution sequence to branch to a predetermined location in the microprogram memory for execution of the following microinstruction; thus eliminating one ROM address register and at least one step in returning to a common address for starting the execution of another microprogram. -1-
286565
Joyce Thomas F.
Raguin Michel M.
Honeywell Information Systems Inc.
Smart & Biggar
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