Method and apparatus for detecting a preamble in a bi-phase...

G - Physics – 06 – F

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G06F 11/00 (2006.01) G11B 20/12 (2006.01) G11B 27/30 (2006.01) H04L 7/04 (2006.01) H04L 7/033 (2006.01)

Patent

CA 1070843

Title of the Invention METHOD AND APPARATUS FOR DETECTING A PREAMBLE IN A BI-PHASE DATA RECOVERY SYSTEM Abstract of the Disclosure In order to detect the eminent reception of a valid bit serial message, a preamble constituting a string of pre- determined number of clock pulses only is employed. Prior to detection of the preamble, each clock and data pulse from the raw data stream is applied to the increment input of a reset- table counter. Each clock pulse is also used to trigger a monostable multivibrator which issues a pulse approximating 3/4 of a cell period. This pulse is ANDed with the next sub- sequent data period, and if a data "1" bit is detected, the satisfied condition is used to reset the counter. Thus, the counter can only reach a terminal count if a valid preamble is received. When the counter attains its terminal count, a latch flip-flop is set and a resultant "separation enable" signal issues to activate straightforward logic for separating the in- coming clock and data pulses. Setting the latch also disables the preamble detection logic until an "end of data field" code is sensed whereupon the counter and latch are both reset to resume observation of the raw data stream for a preamble.

272010

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