H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/149, 316/43
H01L 21/335 (2006.01) H01J 9/02 (2006.01)
Patent
CA 2034481
13 SELF-ALIGNED GATE PROCESS FOR FABRICATING FIELD EMITTER ARRAYS ABSTRACT Conical field emitter elements are formed on a surface of a substrate after which a layer of metal is deposited on top of the substrate surface and over the field emitter elements. A layer of oxide is then deposited over the metal layer. Another layer of metal is deposited over the layer of oxide to form a gate metal layer. A layer of photoresist is then deposited over the gate metal layer. The layer of photoresist is then plasma etched in an oxygen atmosphere to cause portions of the photoresist above respective field emitter elements to be removed and provide self-aligned holes in the photoresist over each of the field emitter elements. The size of the holes may be controlled by appropriately controlling process parameter, including plasma etching time and power and/or initial photoresist thickness. The exposed gate metal layer is etched using the layer of photoresist as a mask. The photoresist layer is removed, and the layer of oxide is etched to expose the field emitter elements. Another oxide layer and an anode metal layer also may be formed over the gate metal layer to produce a self-aligned triode structure.
Bardai Zaher
Forman Ralph
Lamb Arlene E.
Longo Robert T.
Manoly Arthur E.
Hughes Aircraft Company
Sim & Mcburney
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