Address control device for reasonably controlling an address...

Details Address control device for reasonably controlling an address... Address control device for reasonably controlling an address...

G - Physics

06

F

354/230.83

G06F 9/38 (2006.01)

Patent

CA 1286783

Abstract of the Disclosure: In an address control device operable in response to an input virtual address signal to control an access operation to a memory section, an address storing operation is started by an address conversion control section (22) when no real address part is stored in a translation lookaside buffer (21) in correspondence to the input virtual address signal. The address storing operation is continued in the address control device even when a cancellation signal is given from an execution processing unit (12) so as to cancel the access operation, without supply of a request signal to the memory section. For this purpose, an "under operation" signal is produced from an "under operation" flip-flop (46) during the address storing operation to reject reception of the cancellation signal and to hold the input virtual address in a virtual address register (20).

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