Address shuffler

G - Physics – 06 – F

Patent

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354/224, 354/239

G06F 11/20 (2006.01) G06F 12/02 (2006.01)

Patent

CA 1216956

ABSTRACT OF THE DISCLOSURE An address shuffler for use in an address transformation system including an address translator coupled to receive shuffled addresses from the shuffler and output valid data store addresses in response thereto. Economic considerations dictate that the address translator partition a received address into at least two sets, each defining a page of addresses defining a maximum number of defective address locations. The address shuffler operates to shuffle the input address so as to meet the maximum defect requirement while maintaining a unique correspondence and a selected relationship between the input addresses and the shuffled addresses.

497931

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