Backplane bus for differential signals

H - Electricity – 04 – L

Patent

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Details

H04L 25/02 (2006.01) H03K 17/041 (2006.01) H03K 17/687 (2006.01) H03K 19/0175 (2006.01) H03K 19/018 (2006.01) H04B 3/50 (2006.01) H04L 12/40 (2006.01)

Patent

CA 2150490

A differential voltage bus system is disclosed wherein the two leads of the bus are biased by the termination networks with a predetermined voltage difference representing a digital signal of one binary type. The bus driver in each bus master connects a current source to one of the two bus leads and a current sink to the other of the two bus leads in response to an input digital signal of the other binary type thereby changing the voltage difference on the bus to represent the other binary type. In response to an input digital signal of the first-mentioned binary type, the bus driver isolates the current source and sink from the bus and connects them together in order to decrease the detrimental effect of transients. The selective switching in the bus driver is performed by MOSFET switches which are driven by buffer driver circuits each of which uses a combination of MOSFETs and an NPN transistor to drive its respective MOSFET switch with a high peak current thereby enabling rapid switching. The current source and sink in the bus driver also uses a combination of MOSFETs and NPN transistors in order to permit operation of the bus a low voltage levels.

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