Cache data consistency mechanism for workstations and...

Details Cache data consistency mechanism for workstations and... Cache data consistency mechanism for workstations and...

G - Physics

06

F

354/241

G06F 12/00 (2006.01) G06F 13/16 (2006.01)

Patent

CA 2030888

Hardware and software improvements in workstations which utilize a cache for increasing the throughput of Direct Memory Access (DMA) I/O on an operating system supporting multiple concurrent I/O operations. In a workstation or server having an operating system supporting multiple concurrent I/O operations, performance may be improved significantly by including a write back cache for I/O as one of the systems elements. Such write back cache supports external devices with at least two types of device interfaces: a standard system bus interface and a network control interface through a unique combination of hardware and software support while maintaining data consistency between the I/O cache and the CPU cache by providing all associated controls, I/O Cache arrays, CPU Cache arrays, data paths, and diagnostic and programming support necessary to implement an efficient data consistency mechanism between the CPU cache data and I/O Cache data.

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