Decoder for compressed video signals

Details Decoder for compressed video signals Decoder for compressed video signals

G - Physics

06

T

G06T 9/00 (2006.01) H04N 7/26 (2006.01) H04N 7/30 (2006.01) H04N 7/50 (2006.01) H04N 7/133 (1990.01) G06F 15/31 (1990.01)

Patent

CA 2096585

A Decoder for Compressed Video Signals David E. Galbi Stephen C. Purcell Eric Chi-Wang Chai Abstract of the Disclosure A decoder for compressed video signals comprises a central processing unit (CPU), a dynamic random access memory (DRAM) controller, a variable length code (VLC) decoder, a pixel filter and a video output unit. The microcoded CPU performs dequantization and inverse cosine transform using a pipelined data path, which includes both general purpose and special purpose hardware. In one embodiment, the VLC decoder is implemented as a table- driven state machine where the table contains both control information and decoded values.

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