G - Physics – 06 – F
Patent
G - Physics
06
F
354/224
G06F 11/22 (2006.01) G06F 11/00 (2006.01) G06F 11/10 (2006.01)
Patent
CA 2002362
FAULT TOLERANT COMPUTER MEMORY SYSTEMS AND COMPONENTS EMPLOYING DUAL LEVEL ERROR CORRECTION AND DETECTION WITH LOCK-UP FEATURE ABSTRACT OF THE DISCLOSURE In a memory system comprising a plurality of memory units each of which possesses unit-level error correction capabilities and each of which are tied to a system level error correction function, memory reliability is enhanced by providing means for fixing the output of one of the memory units at a fixed value in response to the occurrence of an uncorrectable error in one of the memory units. This counter-intuitive approach to the generation of forced hard errors nonetheless enhances overall memory system reliability since it enables the employment of the complement/recomplement algorithm which depends upon the presence of reproducible errors for proper operation. Thus, chip level error correction systems, which are increasingly desirable at high packaging densities, are employed in a way which does not interfere with system level error correction methods.
Blake Robert M.
Bossen Douglas C.
Chen Chin L.
Fifield John A.
Kalter Howard L.
Barrett B.p.
International Business Machines Corporation
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