Five-volt tolerant differential receiver

Details Five-volt tolerant differential receiver Five-volt tolerant differential receiver

H - Electricity

01

L

H01L 27/088 (2006.01) H01L 23/62 (2006.01) H03K 5/24 (2006.01) H03K 19/0185 (2006.01)

Patent

CA 2072266

ABSTRACT OF THE DISCLOSURE A differential, CMOS receiver includes a transistor, coupled in parallel with an input transistor, which minimizes voltage differentials across an input transistor. A corresponding, similarly sized transistor balances current loading in an output transistor The transistor in parallel with the input transistor, whose drain is coupled directly to the power supply, quickly pulls the input transistor up to power supply voltage on a transient from logical zero to a logical one. Another transistor coupled between the output node and the power supply rail defeats differential amplifier action when the input voltage is high out of its normal range.

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