H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/143
H01L 23/02 (2006.01) H01L 23/498 (2006.01)
Patent
CA 2009723
A semiconductor chip package having a top surface with a recessed chip carrying cavity, and a double row of staggered single tier bonding pads placed around the cavity.
Dunaway Thomas J.
Spielberger Richard K.
Dunaway Thomas J.
Honeywell Inc.
Smart & Biggar
Spielberger Richard K.
LandOfFree
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