Image processing arrangement

G - Physics – 11 – B

Patent

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G11B 23/30 (2006.01) G06T 3/40 (2006.01) G06F 15/66 (1990.01)

Patent

CA 2085712

PHB 33758 ABSTRACT IMAGE PROCESSING ARRANGEMENT A microprocessor (MPU) is programmed to process pixel values of an input image to generate an output image, by means of systematic selection and combination of input pixel values. The system for selection and combination depends on a variable parameter (for example a zoom factor). Means responsive to the parameter value compiles (401) a machine code subroutine which is specific to that parameter and will cause the generation of one row of output pixel values. This compiled filter is then executed repeatedly (408) to generate all rows of the output image. The arrangement substantially eliminates per-pixel decisions, and is consequently faster than conventional microprocessor arrangements. (Figure 4).

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