Input/output control system and method

G - Physics – 06 – F

Patent

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G06F 11/14 (2006.01) G06F 11/20 (2006.01) G06F 13/12 (2006.01) G06F 13/28 (2006.01)

Patent

CA 2098350

-104- Abstract A digital data processing apparatus includes two functional units and a controller for transferring information between them. Each of the functional units includes an associated memory element, such as a random access main memory. The first functional unit includes a sender element that generates a send message descriptor block ("MDB") signal specifying one or more addresses in the associated memory means from which data is to be transferred. The controller identifies a send MDB signal that matches a selected receive MDB signal to generate a signal to effect the transfer of data between the respective memory locations of the first and second functional units specified by the matching MDB signals. A data transfer element within the controller responds to that transfer- effecting signals by (i) applying to the memory of the first functional unit an address signal representative of addresses specified in the send MDB signal and receiving therefrom data signals generated thereby in response to application of that address signal, and (ii) applying those data signals to the memory means of said second functional unit, along with an address signal representative of addresses specified in said receive MDB signal.

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