Integrated circuit chip carrier and its packaging

Details Integrated circuit chip carrier and its packaging Integrated circuit chip carrier and its packaging

H - Electricity

01

R

H01R 33/76 (2006.01)

Patent

CA 2093409

ABSTRACT OF THE DISCLOSURE An LSI chip 8 having bumps 15, which serve as a connecting terminal, on its circuit surface, is loaded on a carrier sub- strate 5, with its face down. A sealing agent 4 is filled within a gap between the LSI chip 8 and the carrier substrate 5 to seal the circuit surface of the LSI chip 8. Further, a heat spreader 1 is joined on the surface opposite to the circuit surface of the LSI chip 8 so that the thermal stress caused by the differ- ence between the thermal expansion coefficient of the LSI chip 8 and that of the carrier substrate 5 can be alleviated and an LSI packaged structure having a further excellent cooling efficiency can be obtained.

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