H - Electricity – 03 – K
Patent
H - Electricity
03
K
328/128
H03K 19/094 (2006.01) H03K 19/0952 (2006.01)
Patent
CA 1189579
ABSTRACT OF THE DISCLOSURE In an integrated logic circuit employing normally off type FET's, it is difficult, but desirable to realize a NAND gate due to unwanted flow of forward current to the next stage. In accordance with the invention, stable NAND gate operation can be realized by placing a NOR gate input in parallel with all gate electrodes of the inputs of the NAND gate, except one gate electrode thereof of which source of the respective FET is grounded.
418567
Hojo Akimichi
Toyoda Nobuyuki
Ridout & Maybee Llp
Tokyo Shibaura Denki Kabushiki Kaisha
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