G - Physics – 06 – F
Patent
G - Physics
06
F
354/33
G06F 15/21 (1990.01)
Patent
CA 2010867
AN INTERCHASSIS COMMUNICATIONS SYSTEM ABSTRACT OF THE DISCLOSURE An interchassis communications system is described which provides an efficient communications scheme for a plurality of processors that are located on a plurality of chassis, so that any processor on any chassis can communicate with any other processor in a manner which minimizes the number of data transfers between chassis, and which can be implemented with a relatively small number of interconnections to provide high data throughput without incurring large latency effects when high volumes of data are transferred. In this system, the chassis are divided into a plurality of first groups of chassis, and a second group of chassis. Communications between processors located on the same chassis is provided by an intrachassis data bus which is preferably located on the backplane of each chassis. Each of the first groups has a data bus which links all the chassis within the group to each other and to a chassis in the second group. The second group of chassis are in turn connected in a point-to-point two terminal manner by other data buses, so that each chassis of the second group is directly connected to every other chassis of the second group. This interchassis communications system permits any processor on any chassis to communicate data to any other processor in no more than three hops between chassis. Further, processors located in the second group of chassis can communicate with any other processor in at most two hops. Thus, processors which require a large amounts of data from other processors may be preferably placed within chassis that form the second group to ensure high data throughput and to minimize latency effects.
Mccalley Karl W.
Szeplaki Victor J.
Wilson Steven D.
Mccalley Karl W.
Osler Hoskin & Harcourt Llp
Szeplaki Victor J.
Wilson Steven D.
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