Intersystem translation logic system

Details Intersystem translation logic system Intersystem translation logic system

G - Physics

06

F

340/84

G06F 15/16 (2006.01)

Patent

CA 1145434

-1- INTERSYSTEM TRANSLATION LOGIC SYSTEM ABSTRACT OF THE DISCLOSURE A logic system is provided for accommodating the exchange of information between two or more communica- tion busses of a data processing system, wherein plural central processing units and plural memory units on independent communication busses may have same logic addresses. Memory and CPU addresses are translated at the bus rate through a multiplicity of flexible address translation ranges to enable a data processing unit on one communication bus to access an apparent contiguous range of addresses encompassing all data processing units on all communication busses.

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