Junction field effect transistor and method of fabricating

Details Junction field effect transistor and method of fabricating Junction field effect transistor and method of fabricating

H - Electricity

01

L

356/149

H01L 29/772 (2006.01) H01L 21/337 (2006.01) H01L 29/45 (2006.01)

Patent

CA 2029521

JUNCTION FIELD EFF~CT TRANSISTOR AND METHOD OF FABRICATING Abstract A junction field effect transistor, specifically a static induction transistor. Prior to metallization a thin layer of germanium is placed over the exposed silicon of the source and gate regions. The germanium is intermixed with the underlying silicGn to form a germanium-silicon composite. A rapid thermal anneal is performed to recrystallize the germanium-silicon composite. Alternatively, a single crystal epitaxial layer may be deposited on the silicon. Conventional metallization procedures are employed to produce ohmic source and gate contact members to the germanium-silicon composite or the epitaxial germanium of the source and qate reglons. By virtue of the reduced bandyap provided by the presence of the germanium, the contact re~istance of the device is reduced.

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