Low delay atm switching system using idle cells stamped with...

Details Low delay atm switching system using idle cells stamped with... Low delay atm switching system using idle cells stamped with...

H - Electricity

04

L

H04L 12/56 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 2088117

In a multi-stage switching system, a time stamp is attached to each cell at an entry point of the system indicating the time of arrival of the cell, and the cell is transferred to a network comprising multiple switching stages each being composed of basic switching modules. The switching modules of all stages are interconnected to form the network. Each switching module comprises a self-routing switch and buffers connected thereto. The time stamp of cells arriving at a given one of the switching modules, where the cells are likely to arrive out of sequence, is constantly monitored and a minimum value of the time stamps is detected. When an empty buffer exists in the given switching module, an idle cell containing the time stamp of the minimum value is generated at the output of the empty buffer.

Dans un système de commutation à étages multiples, un horodateur est fixé à chacune des cellules à un point d'entrée de ce système pour indiquer l'instant d'arrivée de ces cellules et celles-ci sont transférées à un réseau comportant de multiples étages de commutation constitués chacun de modules de commutation de base. Chaque module de commutation comprend un commutateur à autoacheminement et des tampons connectés à celui-ci. Les horodateurs des cellules qui arrivent à l'un des modules de commutation où il est probable qu'elles vont arriver dans le désordre sont constamment surveillés et la valeur minimale des horodateurs est détectée. Quand il y a un tampon vide dans ce module de commutation, une cellule inactive contenant l'horodateur de valeur minimale est engendrée à la sortie de ce tampon.

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