H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 21/302 (2006.01) H01J 37/32 (2006.01) H01L 21/3065 (2006.01) H01L 21/3213 (2006.01) H01L 21/02 (2006.01)
Patent
CA 2259972
A method and apparatus (6) provides for etching a semiconductor wafer (40) using a two step physical etching and chemical etching process in order to create vertical sidewalls (20) required for high density DRAMs and FRAMs.
L'invention concerne un procédé et un appareil (6) pour attaquer une tranche de semi-conducteur (40) à l'aide d'un processus d'attaque physique et d'attaque chimique en deux étapes en vue de créer les parois latérales verticales (20) nécessaires aux mémoires DRAM et FRAM haute densité.
Cofer Alferd
Deornellas Stephen P.
Rajora Paritosh
Gowling Lafleur Henderson Llp
Tegal Corporation
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