Method and circuit arrangement for automatic character...

Details Method and circuit arrangement for automatic character... Method and circuit arrangement for automatic character...

G - Physics

06

K

G06K 9/64 (2006.01) G06K 9/00 (2006.01)

Patent

CA 2092528

- 12 - Abstract The image data (BDAT) associated with a respective document are transmitted to one of a plurality of recog- nition units for the processing of a recognition process comprising a plurality of partial processes. The alloca- tion of the processing jobs and the monitoring of the time cycles of the recognition processes is performed by a control unit (AU), by mean of which a timer is trig- gered to set the processing time of the recognition process in a recognition unit (e.g. RUn), the value of which is compared with an expected value for the process- ing time of the partial process currently running. The partial process results here from the processing status of the recognition unit which is determined by status information and can be called at any time. If the status of the recognition unit is such that, on the basis of the time comparison, no potentially successful execution of the entire recognition process can be expected, this process can be prematurely terminated by the control unit (AU) so as to be available for accepting new document data, especially when all available recognition units are already busy with recognition tasks.

Affiliated with

Also associated with

Rating

Method and circuit arrangement for automatic character... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and circuit arrangement for automatic character..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit arrangement for automatic character... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1531292