Method of forming an integrated circuit package at a wafer...

Details Method of forming an integrated circuit package at a wafer... Method of forming an integrated circuit package at a wafer...

H - Electricity

01

L

H01L 21/56 (2006.01) H01L 21/60 (2006.01) H01L 23/31 (2006.01) H01L 23/498 (2006.01)

Patent

CA 2402082

A method of forming an integrated circuit package at the wafer level. The integrated circuit package occupies a minimum amount of space on an end-use printed circuit board. Solder bumps (30), or conductive adhesive, is deposited on the metallized wirebond pads (23) on the top surface of a silicon wafer (21). An underfill-flux material (27) is deposited over the wafer (21) and the solder bumps (30). A pre-fabricated interposer substrate (31), made of a metal circuitry (34) and a dielectric base (32), has a plurality of metallized through-holes (38) which are aligned with the solder bumps (30). The wafer/interposer assembly is reflowed, or cured, to form the electrical connection between the circuitry on the interposer layer (34) and the circuitry on the wafer. Solder balls (50) are then placed on the metal pad openings on the interposer substrate and are reflowed to form a wafer-level BGA structure. The wafer-level BGA structure is then cut into individual BGA chip packages.

L'invention concerne un procédé de formation d'un assemblage de circuit intégré de niveau de plaquette. Cet assemblage de circuit intégré occupe une quantité minimale d'espace sur un support de circuit imprimé d'utilisation finale. Des bossages de soudure (30) ou d'adhésif conducteur sont déposés sur les blocs de connexion de fil métallisés (23) sur la surface supérieure d'une plaquette de silicium (821). On dépose un matériau de flux-sous rempli (27) sur la plaquette (21) et les bossages de soudure (30). Un substrat d'interposition préfabriqué (31), composé d'un circuit métallique (34) et d'une base diélectrique (32), possède plusieurs canaux métallisés (38) alignés avec les bossages de soudure (30). L'assemblage d'interposition/de plaquette est refondu ou nettoyé, afin de former une connexion électrique entre le circuit sur la couche d'interposition (34) et le circuit sur la plaquette. Les globules de soudure (50) sont ensuite placés sur les orifices de bloc métallique sur le substrat d'interposition, puis refondus, en vue de former une structure de niveau BGA-plaquette. Cette structure de niveau BGA-plaquette est ensuite intégrée dans des assemblages de puces BGA individuels.

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