G - Physics – 06 – F
Patent
G - Physics
06
F
354/235
G06F 13/34 (2006.01)
Patent
CA 1243125
MULTIPLE PORT INTEGRATED DMA AND INTERRUPT CONTROLLER AND ARBITRATOR Abstract Both DMA access and character interrupt driven access Modes of service are provided to multiple communication ports by an integrated arbitration DMA/interrupt controller utilizing its own resident randomly accessible memory. Pipelined logic control architecture for handling service mode adaptations for each individual port and for managing memory accesses to main system memory enables the use of the random access memory with its inherent time delays in a manner that virtually eliminates the effect of any time delay in overall memory access throughput.
500463
Burrus Gilbert S. Jr.
Cooper Ronald J.
Marr Michael R.
Marsico Mario A.
Pescatore John C.
Barrett B.p.
International Business Machines Corporation
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