Parallel crc generation circuit for generating a crc code

Details Parallel crc generation circuit for generating a crc code Parallel crc generation circuit for generating a crc code

H - Electricity

03

M

H03M 13/09 (2006.01)

Patent

CA 2341504

The invention relates to a parallel CRC generation circuit comprising an input register means (I), an output register means (C), a number of XOR gates (XOR1- XORN) and a coupling means (CM) that feeds predetermined ones of the output lines (C0-CN-1) of the output register means (C) and output lines (I1-In) of the input register means (I) as inputs to the respective XOR gates. According to the invention a matrix representation of the state change based on the selected CRC polynomial is set up and evaluated, such that the coupling means (CM) only uses the minimum number of feedbacks of the output lines and feed- forwards of the outputlines of the input register means (I). Thus, the parallel CRC calculation circuit according to the invention has no redundancy and uses only a minimum hardware amount.

L'invention concerne un circuit de génération CRC parallèle comprenant un organe registre d'entrée (I), un organe registre de sortie (C), plusieurs portes OU exclusif (XOR¿1?-XOR¿N?), et un organe de couplage (CM) destiné à alimenter certaines des lignes de sortie (C¿0?-C¿N-1?) dudit organe registre de sortie (C), et certaines des lignes de sortie (I¿1?-I¿n?) dudit organe registre d'entrée (I), sous la forme d'entrées dans les portes OU exclusif respectives. Selon cette invention, on définit et on évalue une représentation matricielle du changement d'état sur la base du polynomial CRC choisi, de sorte que l'organe de couplage (CM) utilise uniquement le nombre minimum de rétroactions et d'actions anticipées des lignes de sortie dudit organe registre d'entrée (I). Le circuit de calcul CRC parallèle de cette invention ne présente donc aucune redondance et n'utilise qu'une quantité limitée de matériel.

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