H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 21/76 (2006.01) H01L 21/306 (2006.01)
Patent
CA 2087235
11 Abstract of the Disclosure A method of planarizing a surface of a semiconductor substrate containing a trench refiled by forming a polysilicon layer, with a thickness of half the width of the trench, over a conformal layer on the substrate and in the trench, is described. Most of the polysilicon layer is oxidized in a controlled manner, with a stressed region of the polysilicon centrally over the trench being oxidized at a reduced rate which compensates for a dip in the polysilicon layer at this point, to leave a thin layer of unoxidized polysilicon which has a planar interface with the oxidized polysilicon, The oxidized polysilicon is wet etched, using the thin layer of unoxidized polysilicon as an etch stop, and the thin layer of unoxidized polysilicon is then dry plasma etched, to leave a planar surface.
Abraham Thomas
Boyd John Malcom
Ellul Joseph Paul
Tay Sing Pin
Haley R. John
Northern Telecom Limited
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