Self-aligning contact and interconnect structure

Details Self-aligning contact and interconnect structure Self-aligning contact and interconnect structure

H - Electricity

01

L

356/126

H01L 21/70 (2006.01) H01L 21/60 (2006.01) H01L 21/768 (2006.01) H01L 21/8238 (2006.01) H01L 21/8244 (2006.01) H01L 23/532 (2006.01) H01L 27/02 (2006.01) H01L 27/11 (2006.01)

Patent

CA 2034075

An MOS transistor for use in an integrated circuit, particularly CMOS integrated circuits, is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of titanium silicide encapulated by a thin film of titanium nitride.

Affiliated with

Also associated with

Rating

Self-aligning contact and interconnect structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-aligning contact and interconnect structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligning contact and interconnect structure will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1631787