Semiconductor capacitor circuit

H - Electricity – 03 – H

Patent

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333/80

H03H 11/40 (2006.01) G11C 27/00 (2006.01) G11C 27/02 (2006.01)

Patent

CA 2039421

SEMICONDUCTOR CAPACITOR CIRCUIT ABSTRACT OF THE DISCLOSURE This invention relates to semiconductor integrated circuits concerned with the realisation of different value capacitive components of a semiconductor chip by means of programming control arrangements. Programmable capacitors are implemented using a capacitive multiplier technique. Programmable capacitors comprise essentially three elements, a capacitor (C1) and one or two capacitor multipliers. Capacitor (C1) is connected to the output of a first buffer circuit while programmable resistors (RP1 and RP2) are connected in series between the input and output of the buffer, an output being taken from the junction between the first and second programmable resistors. By this arrangement of components, the ratio of the set values of the two programmable resistors (RP2 and RP1) determines the amount by which the capacitor (C1) value is multiplied. An overall effective capacitance value equal to (RP2/RP1) x C1 may be achieved. The final effective capacitance with two multipliers approximates to (RP2/RP1) x (RP4/RP3) x C1. The value of programmable resistor RP1 is adjusted in accordance with an analogue reference signal produced by a compensating circuit to compensate for the manufacturing/processing variations of capacitor C1.

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