Submicron bipolar transistor with buried silicide region

Details Submicron bipolar transistor with buried silicide region Submicron bipolar transistor with buried silicide region

H - Electricity

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L

356/162

H01L 29/72 (2006.01) H01L 29/423 (2006.01) H01L 29/732 (2006.01)

Patent

CA 1279410

- 14 - Abstract of the Disclosure A high performance bipolar transistor structure is disclosed which exhibits an extremely low extrinsic base resistance by virtue of a silicide layer which is included in the base contact portion of the structure. The silicide layer is situated to be electrically in parallel with the conventional heavily-doped polysilicon base contact region, where a vertical polysilicon runner is used to provide a self-aligned electrical contact to the base. The parallel combination of the low resistivity (0.5-4 ohm/square) silicide with the polysilicon (sheet resistance of 10- 100 ohm/square) results in a low extrinsic base resistance on the order of 0.5-4 ohm/square. The disclosed device also includes a sub- micron emitter size, defined by vertical oxide sidewalls above the base region, which further improves the high frequency performance of the device.

537982

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