Technique for reducing the number of layers in a multilayer...

Details Technique for reducing the number of layers in a multilayer... Technique for reducing the number of layers in a multilayer...

H - Electricity

05

K

H05K 3/46 (2006.01) H05K 1/00 (2006.01) H05K 1/02 (2006.01) H05K 1/11 (2006.01) H05K 3/42 (2006.01)

Patent

CA 2422677

A technique for reducing the number of layers in a multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from a surface of the multilayer circuit board is disclosed. The technique is realized by a method comprising: forming a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers; arranging the surface such that a first set of two power/ground pins corresponds to a first via and a second set of two power/ground pins corresponds to a second via positioned adjacent the first via, thereby creating a channel; and routing a first plurality of electrical signals through the channel on the first of the plurality of electrically conductive signal layers.

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