Wide frequency-range delay-locked loop circuit

Details Wide frequency-range delay-locked loop circuit Wide frequency-range delay-locked loop circuit

H - Electricity

03

K

H03K 5/15 (2006.01) H03B 27/00 (2006.01) H03K 3/86 (2006.01) H03L 7/081 (2006.01) H03L 7/087 (2006.01) H03L 7/089 (2006.01) H03L 7/10 (2006.01)

Patent

CA 2309522

A delay-locked loop (DLL), including frequency detection logic and a phase detector, is described having an operating range as wide as a conventional charge pump phase locked loop. The frequency detector logic counts the number of rising edges of the multi-phase clocks generated from a reference clock during one period of the reference clock. A loop filter is used to adjust the frequency of each multi- phase clock until frequency lock is obtained by comparing the number of rising edges. After frequency lock, phase detection logic is used to finely tune out the remaining phase error.

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