Insulated gate field effect transistor

Details Insulated gate field effect transistor Insulated gate field effect transistor

H - Electricity

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L

356/128

H01L 29/78 (2006.01) H01L 21/82 (2006.01) H01L 21/8234 (2006.01) H01L 27/088 (2006.01) H01L 29/08 (2006.01) H01L 29/10 (2006.01)

Patent

CA 1189637

Abstract An insulated gate field effect transistor has a well region formed in a surface region of a semiconductor sub- strate of a first conductivity type which has an opening in a part thereof. The well region has a second conductivity type. A source region and a drain region of the first conductivity type oppose the opening of the well region interposed therebetween. A gate electrode is disposed on the substrate surface between the source and drain regions through a gate insulating film. The potentials of the substrate and the well region are fixed so that the junction between the substrate and the well region may be reverse- biased. The transistor is thus operated under the state in which the whole or a part of the well opening is made a depletion layer. The result is a device having a constant current characteristic and a reduced body effect relative to prior designs, and hence a device well suited to use in a monolithic logic integrated circuit.

407812

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