Packaging multi-chip modules without wire-bond interconnection

Details Packaging multi-chip modules without wire-bond interconnection Packaging multi-chip modules without wire-bond interconnection

H - Electricity

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H01L 23/12 (2006.01) H01L 23/02 (2006.01) H01L 23/13 (2006.01) H01L 23/14 (2006.01) H01L 23/31 (2006.01) H01L 23/498 (2006.01) H05K 1/18 (2006.01)

Patent

CA 2166926

Described is a novel packaging of MCM tiles without wire-bond interconnections and in a total thickness which is reduced relative to conventional MCM packaging The MCM tile includes a substrate with a plurality of peripheral metallizations and at least one chip flip-chip mounted on the substrate. The PWB is provided with an aperture which is smaller than the size of the silicon substrate but larger than the outside dimensions of the mounted chips. The substrate is positioned on the PWB so that its ends overlap areas of the PWB adjacent the aperture and the chips fit into the aperture. Peripheral metallizations on the substrate are interconnected to metallizations on the PWB by either solder reflow technology or conductive adhesive technology.

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