Amorphous barrier layer in a ferroelectric memory cell

Details Amorphous barrier layer in a ferroelectric memory cell Amorphous barrier layer in a ferroelectric memory cell

H - Electricity

01

G

H01G 4/06 (2006.01) H01B 12/00 (2006.01) H01L 21/02 (2006.01) H01L 21/768 (2006.01) H01L 27/115 (2006.01)

Patent

CA 2365840

A ferroelectric cell (70), particularly on a silicon substrate (22) comprising an amorphous barrier layer (72) interposed between the ferroelectric stack and the silicon. Preferably, the ferroelectric stack includes conductive metal oxide electrodes sandwiching the ferroelectric layer. The metal oxide may act as a templating layer to crystallographically orient the ferroelectric layer. Alternatively, the electrodes and ferroelectric layer may be polycrystalline. The amorphous barrier layer (72) may be composed of an intermetallic alloy, such as Ti3Al, a metal-metalloid, such as Pd-Si, a combination of early and later transition metals, such as Ti-Ni, and other related compound metal systems, such as (Ti, Zr)-Be, that form amorphous metals.

L'invention concerne une cellule (70) ferroélectrique, notamment sur un substrat (22) de silicium, comprenant une couche barrière (72) amorphe intercalée entre la pile ferroélectrique et le silicium. De préférence, la pile ferroélectrique comprend des électrodes d'oxyde métallique conductrices entre lesquelles est disposée la couche ferroélectrique. L'oxyde métallique peut agir comme une couche gabarit d'orientation cristallographique de la couche ferroélectrique. Dans un autre mode de réalisation, les électrodes et la couche ferroélectrique peuvent être polycristallines. La couche barrière (72) amorphe peut se composer d'un alliage intermétallique tel que Ti¿3?Al, d'un métalloïde métallique tel que Pd-Si, d'une combinaison de métaux de transition précoces et tardifs telle que Ti-Ni et d'autres systèmes métalliques de composés analogues tels que (Ti, Zr)-Be, qui forment des métaux amorphes.

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