H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/1.9
H04J 14/08 (2006.01) H04J 3/07 (2006.01)
Patent
CA 2009472
ABSTRACT OF THE DISCLOSURE A format converting system includes a first converter which converts an input signal into N parallel signals (N is an integer). Each of the N parallel signals has a bit rate less than that of the input signal. A latch circuit temporarily latches the N parallel signals in accordance with a clock signal and outputs a plurality of latched signals having a number larger than the N. A selector selectively outputs the latched signals from the latch circuit and stuff bits to be inserted into the N parallel signals in accordance with a control signal so that N parallel output signals having the N parallel signal and the stuff bits are output from the selector. The stuff bits are used for converting a frame format of the input signal into a different frame format. A control circuit generates the clock signal and generates the control signal which instructs the selector to change an order of selecting the latched outputs and the stuff bits to thereby form the N parallel output signals when the number of the stuff bits to be inserted into the N parallel signals is not an integer multiple of N. A second converter converts the N parallel output signals into a serial output signal having the different frame format.
Eda Hitoshi
Hayashi Akihiro
Takaiwa Kazumaro
Fetherstonhaugh & Co.
Fujitsu Limited
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