G - Physics – 06 – F
Patent
G - Physics
06
F
354/230
G06F 15/16 (2006.01) G06F 9/30 (2006.01) G06F 9/38 (2006.01) G06F 11/00 (2006.01)
Patent
CA 2019299
Digital multiprocessor methods and apparatus comprise a plurality of processors, including a first processor for normally processing an instruction stream including instructions from a first instruction source. At least one of the processors can transmit inserted-instructions to the first processor. Inserted-instructions are executed by the first processor in the same manner as, and without affecting the sequence of, instructions from the first instruction source. The first instruction source can be a memory element, including an instruction cache element for storing digital values representative of instructions and program steps, or an execution unit (CEU) which asserts signals to the instruction cache element to cause instructions to be transmitted to the CEU. The processors include input/output (I/O) processors having direct memory access (DMA) insert elements, which respond to a peripheral device to generate DMA inserted-instructions. These DMA inserted-instructions are executable by the first processing element in the same mariner as, and without affecting processing sequence of, the instructions from the first instruction source.
Burkhardt Henry III
Byers Brett D.
Epstein David I.
Frank Steven
Lee Linda Q.
Kendall Square Research Corporation
Riches Mckenzie & Herbert Llp
Sun Microsystems Inc.
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